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| MC10EP105 Product Preview Quad 2-Input Differential AND/NAND The MC10EP105 is a 2-input differential AND/NAND gate. Each gate is functionally equivalent to a EP05 and LVEL05 devices. With AC performance much faster than the LVEL05 device, the EP105 is ideal for applications requiring the fastest AC performance available. All VCC and VEE pins must be externally connected to power supply to guarantee proper operation. http://onsemi.com * * * * * * * * * * 190ps Typical Propagation Delay High Bandwidth to 3 Ghz Typical ECL mode: 0V VCC with VEE = -3.0V to -5.5V PECL mode: 3.0V to 5.5V VCC with VEE = 0V Internal Input Pulldown Resistors ESD Protection: >2KV HBM, >100V MM New Differential Input Common Mode Range Moisture Sensitivity Level 2 For Additional Information, See Application Note AND8003/D Flammability Rating: UL-94 code V-0 @ 1/8", Oxygen Index 28 to 34 Transistor Count = 444 devices LOGIC DIAGRAM 32-LEAD TQFP FA SUFFIX CASE 873A MARKING DIAGRAM* MC10 EP105 AWLYYWW 32 1 A WL YY WW = Assembly Location = Wafer Lot = Year = Work Week *For additional information, see Application Note AND8002/D PIN DESCRIPTION PIN FUNCTION ECL Data Inputs ECL Data Outputs Reference Voltage Output Positive Supply Negative, 0 Supply Q0 Q0 Dna, Dnb, Dna, Dnb Qn, Qn VBB VCC Q1 Q1 VEE D0a D0a D0b D0b D1a D1a D1b D1b D2a D2a D2b D2b D3a D3a D3b D3b Q2 Q2 Dna L L H H TRUTH TABLE Dnb L H L H Dna H H L L Dnb H L H L Qn L L L H Qn H H H L Q3 Q3 ORDERING INFORMATION Device MC10EP105FA This document contains information on a product under development. ON Semiconductor reserves the right to change or discontinue this product without notice. Package TQFP TQFP Shipping 250 Units/Tray 2000 Tape & Reel MC10EP105FAR2 (c) Semiconductor Components Industries, LLC, 1999 1 December, 1999 - Rev. 0 Publication Order Number: MC10EP105/D MC10EP105 D0b D1a D1a D1b D1b D2a D2a D2b 24 D0b D0a D0a VEE Q0 Q0 VCC VCC 25 26 27 28 23 22 21 20 19 18 17 16 15 14 13 D2b D3a D3a VCC D3b D3b VEE NC MC10EP105 29 30 31 32 1 2 3 4 5 6 7 8 12 11 10 9 VCC Q1 Q1 Q2 Q2 Q3 Q3 VCC Figure 1. 32-Lead TQFP Pinout (Top View) Warning: All VCC and VEE pins must be externally connected to Power Supply to guarantee proper operation. MAXIMUM RATINGS* Symbol VEE VCC VI VI Iout TA Tstg JA JC Tsol Power Supply (VCC = 0V) Power Supply (VEE = 0V) Input Voltage (VCC = 0V, VI not more negative than VEE) Input Voltage (VEE = 0V, VI not more positive than VCC) Output Current Operating Temperature Range Storage Temperature Thermal Resistance (Junction-to-Ambient) Thermal Resistance (Junction-to-Case) Solder Temperature (<2 to 3 Seconds: 245C desired) Still Air 500lfpm Continuous Surge Parameter Value -6.0 to 0 6.0 to 0 -6.0 to 0 6.0 to 0 50 100 -40 to +85 -65 to +150 80 55 12 to 17 265 Unit VDC VDC VDC VDC mA C C C/W C/W C * Maximum Ratings are those values beyond which damage to the device may occur. http://onsemi.com 2 MC10EP105 DC CHARACTERISTICS, ECL/LVECL (VCC = 0V; VEE = -5.5V to -3.0V) (Note 4.) -40C Symbol IEE VOH VOL VIH VIL Characteristic Power Supply Current (Note 1.) Output HIGH Voltage (Note 2.) Output LOW Voltage (Note 2.) Input HIGH Voltage Single Ended Input LOW Voltage Single Ended -1135 -1935 -1210 -1935 VEE+2.0 -1060 -1810 -885 -1685 -885 -1610 0.0 150 D D 0.5 -150 0.5 -150 -1070 -1870 -1145 -1870 VEE+2.0 Min Typ Max Min 25C Typ 59 -945 -1745 -820 -1620 -820 -1545 0.0 150 0.5 -150 -1010 -1810 -1085 -1810 VEE+2.0 -885 -1685 -760 -1560 -760 -1485 0.0 150 Max Min 85C Typ Max Unit mA mV mV mV mV V A A VIHCMR Input HIGH Voltage Common Mode Range (Note 3.) IIH IIL Input HIGH Current Input LOW Current NOTE: 10EP circuits are designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit board and transverse airflow greater than 500lfpm is maintained. 1. VCC = 0V, VEE = VEEmin to VEEmax, all other pins floating. 2. All loading with 50 ohms to VCC-2.0 volts. 3. VIHCMR min varies 1:1 with VEE, max varies 1:1 with VCC. 4. Input and output parameters vary 1:1 with VCC. DC CHARACTERISTICS, LVPECL (VCC = 3.3V 0.3V, VEE = 0V) (Note 8.) -40C Symbol IEE VOH VOL VIH VIL Characteristic Power Supply Current (Note 5.) Output HIGH Voltage (Note 6.) Output LOW Voltage (Note 6.) Input HIGH Voltage Single Ended Input LOW Voltage Single Ended 2165 1365 2090 1365 2.0 2240 1490 2415 1615 2415 1690 3.3 150 D D 0.5 -150 0.5 -150 2230 1430 2155 1430 2.0 Min Typ Max Min 25C Typ 59 2355 1555 2480 1680 2480 1755 3.3 150 0.5 -150 2290 1490 2215 1490 2.0 2415 1615 2540 1740 2540 1815 3.3 150 Max Min 85C Typ Max Unit mA mV mV mV mV V A A VIHCMR Input HIGH Voltage Common Mode Range (Note 7.) IIH IIL Input HIGH Current Input LOW Current NOTE: 10EP circuits are designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit board and transverse airflow greater than 500lfpm is maintained. 5. VCC = 3.3V, VEE = 0V, all other pins floating. 6. All loading with 50 ohms to VCC-2.0 volts. 7. VIHCMR min varies 1:1 with VEE, max varies 1:1 with VCC. 8. Input and output parameters vary 1:1 with VCC. http://onsemi.com 3 MC10EP105 DC CHARACTERISTICS, PECL (VCC = 5.0V 0.5V, VEE = 0V) (Note 12.) -40C Symbol IEE VOH VOL VIH VIL Characteristic Power Supply Current (Note 9.) Output HIGH Voltage (Note 10.) Output LOW Voltage (Note 10.) Input HIGH Voltage Single Ended Input LOW Voltage Single Ended 3865 3065 3790 3065 2.0 3940 3190 4115 3315 4115 3390 5.0 150 D D 0.5 -150 0.5 -150 3930 3130 3855 3130 2.0 Min Typ Max Min 25C Typ 59 4055 3255 4180 3380 4180 3455 5.0 150 0.5 -150 3990 3190 3915 3190 2.0 4115 3315 4240 3440 4240 3515 5.0 150 Max Min 85C Typ Max Unit mA mV mV mV mV V A A VIHCMR Input HIGH Voltage Common Mode Range (Note 11.) IIH IIL Input HIGH Current Input LOW Current NOTE: 10EP circuits are designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit board and transverse airflow greater than 500lfpm is maintained. 9. VCC = 5.0V, VEE = 0V, all other pins floating. 10. All loading with 50 ohms to VCC-2.0 volts. 11. VIHCMR min varies 1:1 with VEE, max varies 1:1 with VCC. 12. Input and output parameters vary 1:1 with VCC. AC CHARACTERISTICS (VCC = 0V; VEE = -3.0V to -5.5V) or (VCC = 3.0V to 5.5V; VEE = 0V) -40C Symbol fmax tPLH, tPHL tSKEW tJITTER VPP Characteristic Maximum Toggle Frequency (Note 13.) Propagation Delay to Output Differential Duty Cycle Skew (Note 14.) Cycle-to-Cycle Jitter Input Voltage Swing (Diff.) 150 5.0 TBD 800 1200 150 Min Typ 3.0 Max Min 25C Typ 3.0 190 5.0 TBD 800 1200 150 20 5.0 TBD 800 1200 20 Max Min 85C Typ 3.0 Max Unit GHz ps ps ps mV tr Output Rise/Fall Times Q 120 ps tf (20% - 80%) 13. Fmax guaranteed for functionality only. VOL and VOH levels are guaranteed at DC only. 14. Skew is measured between outputs under identical transitions. Duty cycle skew is defined only for differential operation when the delays are measured from the cross point of the inputs to the cross point of the outputs. http://onsemi.com 4 MC10EP105 PACKAGE DIMENSIONS TQFP FA SUFFIX 32-LEAD PLASTIC PACKAGE CASE 873A-02 ISSUE A A A1 32 25 4X 0.20 (0.008) AB T-U Z 1 -T- B B1 8 -U- V P DETAIL Y 17 AE V1 AE DETAIL Y 9 -Z- 9 S1 S 4X 0.20 (0.008) AC T-U Z G -AB- SEATING PLANE DETAIL AD -AC- BASE METAL N F 8X D M_ R 0.20 (0.008) M AC T-U Z 0.10 (0.004) AC NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DATUM PLANE -AB- IS LOCATED AT BOTTOM OF LEAD AND IS COINCIDENT WITH THE LEAD WHERE THE LEAD EXITS THE PLASTIC BODY AT THE BOTTOM OF THE PARTING LINE. 4. DATUMS -T-, -U-, AND -Z- TO BE DETERMINED AT DATUM PLANE -AB-. 5. DIMENSIONS S AND V TO BE DETERMINED AT SEATING PLANE -AC-. 6. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. ALLOWABLE PROTRUSION IS 0.250 (0.010) PER SIDE. DIMENSIONS A AND B DO INCLUDE MOLD MISMATCH AND ARE DETERMINED AT DATUM PLANE -AB-. 7. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. DAMBAR PROTRUSION SHALL NOT CAUSE THE D DIMENSION TO EXCEED 0.520 (0.020). 8. MINIMUM SOLDER PLATE THICKNESS SHALL BE 0.0076 (0.0003). 9. EXACT SHAPE OF EACH CORNER MAY VARY FROM DEPICTION. MILLIMETERS MIN MAX 7.000 BSC 3.500 BSC 7.000 BSC 3.500 BSC 1.400 1.600 0.300 0.450 1.350 1.450 0.300 0.400 0.800 BSC 0.050 0.150 0.090 0.200 0.500 0.700 12_ REF 0.090 0.160 0.400 BSC 1_ 5_ 0.150 0.250 9.000 BSC 4.500 BSC 9.000 BSC 4.500 BSC 0.200 REF 1.000 REF INCHES MIN MAX 0.276 BSC 0.138 BSC 0.276 BSC 0.138 BSC 0.055 0.063 0.012 0.018 0.053 0.057 0.012 0.016 0.031 BSC 0.002 0.006 0.004 0.008 0.020 0.028 12_ REF 0.004 0.006 0.016 BSC 1_ 5_ 0.006 0.010 0.354 BSC 0.177 BSC 0.354 BSC 0.177 BSC 0.008 REF 0.039 REF J CE SECTION AE-AE X DETAIL AD GAUGE PLANE http://onsemi.com 5 0.250 (0.010) H W K Q_ DIM A A1 B B1 C D E F G H J K M N P Q R S S1 V V1 W X -T-, -U-, -Z- EE EE EE EE MC10EP105 Notes http://onsemi.com 6 MC10EP105 Notes http://onsemi.com 7 MC10EP105 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. PUBLICATION ORDERING INFORMATION North America Literature Fulfillment: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada Email: ONlit@hibbertco.com N. American Technical Support: 800-282-9855 Toll Free USA/Canada EUROPE: LDC for ON Semiconductor - European Support German Phone: (+1) 303-308-7140 (M-F 2:30pm to 5:00pm Munich Time) Email: ONlit-german@hibbertco.com French Phone: (+1) 303-308-7141 (M-F 2:30pm to 5:00pm Toulouse Time) Email: ONlit-french@hibbertco.com English Phone: (+1) 303-308-7142 (M-F 1:30pm to 5:00pm UK Time) Email: ONlit@hibbertco.com ASIA/PACIFIC: LDC for ON Semiconductor - Asia Support Phone: 303-675-2121 (Tue-Fri 9:00am to 1:00pm, Hong Kong Time) Toll Free from Hong Kong 800-4422-3781 Email: ONlit-asia@hibbertco.com JAPAN: ON Semiconductor, Japan Customer Focus Center 4-32-1 Nishi-Gotanda, Shinagawa-ku, Tokyo, Japan 141-8549 Phone: 81-3-5740-2745 Email: r14525@onsemi.com Fax Response Line: 303-675-2167 800-344-3810 Toll Free USA/Canada ON Semiconductor Website: http://onsemi.com For additional information, please contact your local Sales Representative. http://onsemi.com 8 MC10EP105/D |
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